[pbsd-mg2] Re: cache problem again

[Warner Losh <imp@village.org>]

In message <199908261643.KAA65569@harmony.village.org> Warner Losh writes:
: I believe that some caching problem still remains.

One possibility that might account for this (but might not too) is
that somehow a parity error in the cache is occurring, why I'm not
sure.  It appears that the hpcmips kernel doesn't install a cache
error vector at all.  I'm not sure what this means is there (the old
WinCE version, random garbage or a simple eret), but we should at
least put an ERET there.

For the Vr4111 and newer, this functionality has been eliminated from
the chip.  For the Vr4102 and older, this functionality is present.
I've spent a fair amount of time tracking this down tonight (the
possibility, but not on the Everex Associate).

There is also a related Parity Error Register (26) that might not be
initialized properly for some instances of the CACHE instruction.

I'll investigate this possibiltiy and see if I can come up with
something sane to test this theory.  I'm too fried tonight to do it
now.

Does this sound like it might account for the strange behavior that
I'm seeing?

Warner