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Re: PCI mis configuration of L-Router
> L-RouterでfxpがI/O空間経由でないと動作しなかった件ですが、ROMモニタで行
> なわれているBARの設定が間違っているのが原因だったと思われます。
確かに. attach するときに無理矢理書き直してやれば, memory space
使っても動きますね.
vrpciu0 at vrip0 addr 0xf000c00-0xf000dff intr 22
pci0 at vrpciu0 bus 0
pci0: i/o space, memory space enabled, rd/line ok
fxp0 at pci0 dev 0 function 0
fxp0: PCI configuration registers:
Common header:
0x00: 0x12098086 0x02900147 0x02000009 0x00001810
Vendor Name: Intel (0x8086)
Device Name: 82559ER Fast Ethernet LAN Controller (0x1209)
Command register: 0x0147
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x09
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x18
Cache Line Size: 0x10
Type 0 ("normal" device) header:
0x10: 0xb0100000 0x00de0001 0xfffe0000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000dc 0x00000000 0x38080100
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xb0100000, size: 0x00001000
Base address register at 0x14
type: 32-bit i/o
base: 0x00de0000, size: 0x00000040
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0xfffe0000, size: 0x00020000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xdc
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x38
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x00
Capability register at 0xdc
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x7e220001
0xe0: 0x3c004000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
fxp0: MMBA 0xb0100000 -> 0x11100000
fxp0: using memory space
fxp0: i82559S Ethernet, rev 9
fxp0: interrupting at GPIO c
fxp0: Ethernet address 00:00:32:03:12:66
inphy0 at fxp0 phy 1: i82555 10/100 media interface, rev. 4
inphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
:
# それにしても 00:00:32 って… ?
enami.