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VR4121 dcu & dmaau
濱嶋です。
VR4121のaiuドライバですが、放っておくと追従するのが大変なので、これ以
上は変更しないと思うdcuとdmaauだけ先にマージをお願いできませんか?
一番肝心のaiuはもうちょっと待って下さい。あれこれいじり過ぎたら再生速
度は速くなるわ、関係ないところでTLB missが発生するわで、元に戻そうと努
力しているところです。
dcuとdmaauのカーネル定義ファイルへの追加は以下になります。
vrdmaau* at vrip? addr 0x0b000020 size 0x18
vrdcu* at vrip? addr 0x0b000040 size 0x0c
すいませんが、よろしくお願いします。
Index: sys/arch/hpcmips/conf/files.hpcmips
diff -c sys/arch/hpcmips/conf/files.hpcmips:1.1.1.2 sys/arch/hpcmips/conf/files.hpcmips:1.1.1.2.2.3
*** sys/arch/hpcmips/conf/files.hpcmips:1.1.1.2 Tue Jan 29 02:09:51 2002
--- sys/arch/hpcmips/conf/files.hpcmips Sat Feb 2 13:09:36 2002
***************
*** 401,403 ****
--- 401,413 ----
major {md = 6}
include "dev/usb/files.usb"
+
+ # DMA Address Unit
+ device vrdmaau
+ attach vrdmaau at vripif
+ file arch/hpcmips/vr/dmaau.c vrdmaau
+
+ # DMA Controll Unit
+ device vrdcu
+ attach vrdcu at vripif
+ file arch/hpcmips/vr/dcu.c vrdcu
Index: sys/arch/hpcmips/vr/dcu.c
diff -c /dev/null sys/arch/hpcmips/vr/dcu.c:1.1.4.4
*** /dev/null Sat Feb 2 13:10:10 2002
--- sys/arch/hpcmips/vr/dcu.c Thu Jan 31 18:19:13 2002
***************
*** 0 ****
--- 1,233 ----
+ /*
+ * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+ #include <sys/param.h>
+ #include <sys/systm.h>
+ #include <sys/device.h>
+
+ #include <uvm/uvm_extern.h>
+
+ #include <machine/cpu.h>
+ #include <machine/bus.h>
+ #include <machine/bus_dma_hpcmips.h>
+
+ #include <hpcmips/vr/vripif.h>
+ #include <hpcmips/vr/dcureg.h>
+
+ #ifdef VRDCU_DEBUG
+ int vrdcu_debug = VRDCU_DEBUG;
+ #define DPRINTFN(n,x) if (vrdcu_debug>(n)) printf x;
+ #else
+ #define DPRINTFN(n,x)
+ #endif
+
+ struct vrdcu_softc {
+ struct device sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ struct vrdcu_chipset_tag sc_chipset;
+ int sc_status; /* DMA status */
+ };
+
+ int vrdcu_match(struct device *, struct cfdata *, void *);
+ void vrdcu_attach(struct device *, struct device *, void *);
+
+ struct cfattach vrdcu_ca = {
+ sizeof(struct vrdcu_softc), vrdcu_match, vrdcu_attach
+ };
+
+ int vrdcu_enable_aiuin(vrdcu_chipset_tag_t);
+ int vrdcu_enable_aiuout(vrdcu_chipset_tag_t);
+ int vrdcu_enable_fir(vrdcu_chipset_tag_t);
+ void vrdcu_disable(vrdcu_chipset_tag_t);
+ void vrdcu_fir_direction(vrdcu_chipset_tag_t, int);
+ int _vrdcu_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
+ bus_size_t, bus_dma_segment_t *, int, int *, int);
+
+ struct bus_dma_tag vrdcu_bus_dma_tag = {
+ NULL,
+ {
+ _hpcmips_bd_map_create,
+ _hpcmips_bd_map_destroy,
+ _hpcmips_bd_map_load,
+ _hpcmips_bd_map_load_mbuf,
+ _hpcmips_bd_map_load_uio,
+ _hpcmips_bd_map_load_raw,
+ _hpcmips_bd_map_unload,
+ _hpcmips_bd_map_sync,
+ _vrdcu_dmamem_alloc,
+ _hpcmips_bd_mem_free,
+ _hpcmips_bd_mem_map,
+ _hpcmips_bd_mem_unmap,
+ _hpcmips_bd_mem_mmap,
+ },
+ };
+
+ int
+ vrdcu_match(struct device *parent, struct cfdata *cf, void *aux)
+ {
+ return 2; /* 1st attach group of vrip */
+ }
+
+ void
+ vrdcu_attach(struct device *parent, struct device *self, void *aux)
+ {
+ struct vrip_attach_args *va = aux;
+ struct vrdcu_softc *sc = (void*)self;
+
+ sc->sc_iot = va->va_iot;
+ sc->sc_chipset.dc_sc = sc;
+ sc->sc_chipset.dc_enable_aiuin = vrdcu_enable_aiuin;
+ sc->sc_chipset.dc_enable_aiuout = vrdcu_enable_aiuout;
+ sc->sc_chipset.dc_enable_fir = vrdcu_enable_fir;
+ sc->sc_chipset.dc_disable = vrdcu_disable;
+ sc->sc_chipset.dc_fir_direction = vrdcu_fir_direction;
+
+ if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
+ 0 /* no flags */, &sc->sc_ioh)) {
+ printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
+ return;
+ }
+ printf("\n");
+ vrip_register_dcu(va->va_vc, &sc->sc_chipset);
+
+ sc->sc_status = DMASDS;
+ /* reset DCU */
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMARST_REG_W, DMARST);
+ }
+
+ int
+ vrdcu_enable_aiuin(vrdcu_chipset_tag_t dc)
+ {
+ struct vrdcu_softc *sc = dc->dc_sc;
+ int mask;
+
+ DPRINTFN(1, ("vrdcu_enable_aiuin\n"));
+
+ if (sc->sc_status){
+ mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
+ if (mask & DMAMSKAIN) {
+ DPRINTFN(0, ("vrdcu_enable_aiuin: already enabled\n"));
+ return 0;
+ } else {
+ DPRINTFN(0, ("vrdcu_enable_aiuin: device busy\n"));
+ return EBUSY;
+ }
+ }
+ sc->sc_status = DMASEN;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAIN);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
+ return 0;
+ }
+
+ int
+ vrdcu_enable_aiuout(vrdcu_chipset_tag_t dc)
+ {
+ struct vrdcu_softc *sc = dc->dc_sc;
+ int mask;
+
+ DPRINTFN(1, ("vrdcu_enable_aiuout\n"));
+
+ if (sc->sc_status){
+ mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
+ if (mask & DMAMSKAOUT) {
+ DPRINTFN(0, ("vrdcu_enable_aiuout: already enabled\n"));
+ return 0;
+ } else {
+ DPRINTFN(0, ("vrdcu_enable_aiuout: device busy\n"));
+ return EBUSY;
+ }
+ }
+ sc->sc_status = DMASEN;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAOUT);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
+ return 0;
+ }
+
+ int
+ vrdcu_enable_fir(vrdcu_chipset_tag_t dc)
+ {
+ struct vrdcu_softc *sc = dc->dc_sc;
+ int mask;
+
+ DPRINTFN(1, ("vrdcu_enable_fir\n"));
+
+ if (sc->sc_status){
+ mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
+ if (mask & DMAMSKFOUT) {
+ DPRINTFN(0, ("vrdcu_enable_fir: already enabled\n"));
+ return 0;
+ } else {
+ DPRINTFN(0, ("vrdcu_enable_fir: device busy\n"));
+ return EBUSY;
+ }
+ }
+ sc->sc_status = DMASEN;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKFOUT);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
+ return 0;
+ }
+
+ void
+ vrdcu_disable(vrdcu_chipset_tag_t dc)
+ {
+ struct vrdcu_softc *sc = dc->dc_sc;
+
+ DPRINTFN(1, ("vrdcu_disable\n"));
+
+ sc->sc_status = DMASDS;
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
+ }
+
+ void
+ vrdcu_fir_direction(vrdcu_chipset_tag_t dc, int dir)
+ {
+ struct vrdcu_softc *sc = dc->dc_sc;
+
+ DPRINTFN(1, ("vrdcu_fir_direction: dir %d\n", dir));
+
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh,
+ DMATD_REG_W, dir & DMATDMASK);
+ }
+
+ int
+ _vrdcu_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
+ bus_size_t boundary, bus_dma_segment_t *segs,
+ int nsegs, int *rsegs, int flags)
+ {
+ extern paddr_t avail_start, avail_end; /* XXX */
+ paddr_t high;
+
+ DPRINTFN(1, ("_vrdcu_dmamem_alloc\n"));
+
+ high = (avail_end < VRDMAAU_BOUNCE_THRESHOLD ?
+ avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE;
+ alignment = alignment > VRDMAAU_ALIGNMENT ?
+ alignment : VRDMAAU_ALIGNMENT;
+
+ return _hpcmips_bd_mem_alloc_range(t, size, alignment, boundary,
+ segs, nsegs, rsegs, flags,
+ avail_start, high);
+ }
Index: sys/arch/hpcmips/vr/dcuvar.h
diff -c /dev/null sys/arch/hpcmips/vr/dcuvar.h:1.1.4.3
*** /dev/null Sat Feb 2 13:10:10 2002
--- sys/arch/hpcmips/vr/dcuvar.h Thu Jan 31 18:19:13 2002
***************
*** 0 ****
--- 1,37 ----
+ /*
+ * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+ struct vrdcu_chipset_tag;
+ typedef struct vrdcu_chipset_tag *vrdcu_chipset_tag_t;
+ struct vrdcu_chipset_tag {
+ void *dc_sc;
+ int (*dc_enable_aiuin)(vrdcu_chipset_tag_t);
+ int (*dc_enable_aiuout)(vrdcu_chipset_tag_t);
+ int (*dc_enable_fir)(vrdcu_chipset_tag_t);
+ void (*dc_disable)(vrdcu_chipset_tag_t);
+ void (*dc_fir_direction)(vrdcu_chipset_tag_t, int);
+ };
+
+ extern struct bus_dma_tag vrdcu_bus_dma_tag;
Index: sys/arch/hpcmips/vr/dmaau.c
diff -c /dev/null sys/arch/hpcmips/vr/dmaau.c:1.1.4.4
*** /dev/null Sat Feb 2 13:10:10 2002
--- sys/arch/hpcmips/vr/dmaau.c Thu Jan 31 18:19:13 2002
***************
*** 0 ****
--- 1,164 ----
+ /*
+ * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+ #include <sys/param.h>
+ #include <sys/systm.h>
+ #include <sys/device.h>
+
+ #include <machine/bus.h>
+
+ #include <hpcmips/vr/vripif.h>
+ #include <hpcmips/vr/dmaaureg.h>
+
+ #ifdef VRDMAAU_DEBUG
+ int vrdmaau_debug = VRDMAAU_DEBUG;
+ #define DPRINTFN(n,x) if (vrdmaau_debug>(n)) printf x;
+ #else
+ #define DPRINTFN(n,x)
+ #endif
+
+ struct vrdmaau_softc {
+ struct device sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ struct vrdmaau_chipset_tag sc_chipset;
+ };
+
+ int vrdmaau_match(struct device *, struct cfdata *, void *);
+ void vrdmaau_attach(struct device *, struct device *, void *);
+
+ struct cfattach vrdmaau_ca = {
+ sizeof(struct vrdmaau_softc), vrdmaau_match, vrdmaau_attach
+ };
+
+ int vrdmaau_set_aiuin(vrdmaau_chipset_tag_t, void *);
+ int vrdmaau_set_aiuout(vrdmaau_chipset_tag_t, void *);
+ int vrdmaau_set_fir(vrdmaau_chipset_tag_t, void *);
+ static int vrdmaau_phy_addr(struct vrdmaau_softc *, void *, u_int32_t *);
+
+ int
+ vrdmaau_match(struct device *parent, struct cfdata *cf, void *aux)
+ {
+ return 2; /* 1st attach group of vrip */
+ }
+
+ void
+ vrdmaau_attach(struct device *parent, struct device *self, void *aux)
+ {
+ struct vrip_attach_args *va = aux;
+ struct vrdmaau_softc *sc = (void*)self;
+
+ sc->sc_iot = va->va_iot;
+ sc->sc_chipset.ac_sc = sc;
+ sc->sc_chipset.ac_set_aiuin = vrdmaau_set_aiuin;
+ sc->sc_chipset.ac_set_aiuout = vrdmaau_set_aiuout;
+ sc->sc_chipset.ac_set_fir = vrdmaau_set_fir;
+
+ if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
+ 0 /* no flags */, &sc->sc_ioh)) {
+ printf(": can't map i/o space\n");
+ return;
+ }
+ printf("\n");
+ vrip_register_dmaau(va->va_vc, &sc->sc_chipset);
+ }
+
+ int
+ vrdmaau_set_aiuin(vrdmaau_chipset_tag_t ac, void *addr)
+ {
+ struct vrdmaau_softc *sc = ac->ac_sc;
+ u_int32_t phy;
+ int err;
+
+ DPRINTFN(1, ("vrdmaau_set_aiuin: address %p\n", addr));
+
+ if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
+ return err;
+
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAH_REG_W, phy >> 16);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAL_REG_W, phy & 0xffff);
+ return 0;
+ }
+
+ int
+ vrdmaau_set_aiuout(vrdmaau_chipset_tag_t ac, void *addr)
+ {
+ struct vrdmaau_softc *sc = ac->ac_sc;
+ u_int32_t phy;
+ int err;
+
+ DPRINTFN(1, ("vrdmaau_set_aiuout: address %p\n", addr));
+
+ if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
+ return err;
+
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAH_REG_W, phy >> 16);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAL_REG_W, phy & 0xffff);
+ return 0;
+ }
+
+ int
+ vrdmaau_set_fir(vrdmaau_chipset_tag_t ac, void *addr)
+ {
+ struct vrdmaau_softc *sc = ac->ac_sc;
+ u_int32_t phy;
+ int err;
+
+ DPRINTFN(1, ("vrdmaau_set_fir: address %p\n", addr));
+
+ if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
+ return err;
+
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, FIRBAH_REG_W, phy >> 16);
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, FIRBAL_REG_W, phy & 0xffff);
+ return 0;
+ }
+
+ static int
+ vrdmaau_phy_addr(struct vrdmaau_softc *sc, void *addr, u_int32_t *phy)
+ {
+ DPRINTFN(1, ("vrdmaau_phy_addr\n"));
+
+ if (addr >= (void *)MIPS_KSEG0_START &&
+ addr < (void *)MIPS_KSEG1_START)
+ *phy = MIPS_KSEG0_TO_PHYS(addr);
+ else if (addr >= (void *)MIPS_KSEG1_START &&
+ addr < (void *)MIPS_KSEG2_START)
+ *phy = MIPS_KSEG1_TO_PHYS(addr);
+ else {
+ DPRINTFN(0, ("vrdmaau_map_addr: invalid address %p\n", addr));
+ return EFAULT;
+ }
+
+ #ifdef DIAGNOSTIC
+ if ((*phy & (VRDMAAU_ALIGNMENT - 1)) ||
+ *phy >= VRDMAAU_BOUNCE_THRESHOLD ) {
+ printf("%s: vrdmaau_phy_addr: invalid address %p\n",
+ sc->sc_dev.dv_xname, addr);
+ return EINVAL;
+ }
+ #endif
+ return 0;
+ }
Index: sys/arch/hpcmips/vr/dmaauvar.h
diff -c /dev/null sys/arch/hpcmips/vr/dmaauvar.h:1.1.4.3
*** /dev/null Sat Feb 2 13:10:10 2002
--- sys/arch/hpcmips/vr/dmaauvar.h Thu Jan 31 18:19:13 2002
***************
*** 0 ****
--- 1,36 ----
+ /*
+ * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+ #define VRDMAAU_BOUNCE_THRESHOLD (64 * 1024 * 1024)
+ #define VRDMAAU_ALIGNMENT (1 << 10)
+
+ struct vrdmaau_chipset_tag;
+ typedef struct vrdmaau_chipset_tag *vrdmaau_chipset_tag_t;
+ struct vrdmaau_chipset_tag {
+ void *ac_sc;
+ int (*ac_set_aiuin)(vrdmaau_chipset_tag_t, void *);
+ int (*ac_set_aiuout)(vrdmaau_chipset_tag_t, void *);
+ int (*ac_set_fir)(vrdmaau_chipset_tag_t, void *);
+ };
Index: sys/arch/hpcmips/vr/vrip.c
diff -c sys/arch/hpcmips/vr/vrip.c:1.1.1.2 sys/arch/hpcmips/vr/vrip.c:1.1.1.2.2.4
*** sys/arch/hpcmips/vr/vrip.c:1.1.1.2 Tue Jan 29 02:09:54 2002
--- sys/arch/hpcmips/vr/vrip.c Sat Feb 2 13:08:40 2002
***************
*** 107,112 ****
--- 107,114 ----
u_int32_t*);
void __vrip_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
void __vrip_register_gpio(vrip_chipset_tag_t, hpcio_chip_t);
+ void __vrip_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
+ void __vrip_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
void __vrip_dump_level2mask(vrip_chipset_tag_t, void *);
struct cfattach vrip_ca = {
***************
*** 124,129 ****
--- 126,133 ----
.vc_intr_getstatus2 = __vrip_intr_getstatus2,
.vc_register_cmu = __vrip_register_cmu,
.vc_register_gpio = __vrip_register_gpio,
+ .vc_register_dmaau = __vrip_register_dmaau,
+ .vc_register_dcu = __vrip_register_dcu,
};
static const struct vrip_unit vrip_units[] = {
***************
*** 240,247 ****
the_vrip_sc = sc;
/*
* Attach each devices
! * GIU CMU interface interface is used by other system device.
! * so attach first
*/
sc->sc_pri = 2;
config_search(vrip_search, self, vrip_print);
--- 244,251 ----
the_vrip_sc = sc;
/*
* Attach each devices
! * GIU CMU DMAAU DCU interface interface is used by other system
! * device. so attach first
*/
sc->sc_pri = 2;
config_search(vrip_search, self, vrip_print);
***************
*** 277,282 ****
--- 281,289 ----
va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2];
va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2];
va.va_gpio_chips = sc->sc_gpio_chips;
+ va.va_cc = sc->sc_chipset.vc_cc;
+ va.va_ac = sc->sc_chipset.vc_ac;
+ va.va_dc = sc->sc_chipset.vc_dc;
if (((*cf->cf_attach->ca_match)(parent, cf, &va) == sc->sc_pri))
config_attach(parent, cf, &va, vrip_print);
***************
*** 510,513 ****
--- 517,536 ----
panic("%s: '%s' has unknown id, %d", __FUNCTION__,
chip->hc_name, chip->hc_chipid);
sc->sc_gpio_chips[chip->hc_chipid] = chip;
+ }
+
+ void
+ __vrip_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau)
+ {
+ struct vrip_softc *sc = vc->vc_sc;
+
+ sc->sc_chipset.vc_ac = dmaau;
+ }
+
+ void
+ __vrip_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu)
+ {
+ struct vrip_softc *sc = vc->vc_sc;
+
+ sc->sc_chipset.vc_dc = dcu;
}
Index: sys/arch/hpcmips/vr/vripif.h
diff -c sys/arch/hpcmips/vr/vripif.h:1.1.1.1 sys/arch/hpcmips/vr/vripif.h:1.1.1.1.2.2
*** sys/arch/hpcmips/vr/vripif.h:1.1.1.1 Tue Jan 29 02:09:54 2002
--- sys/arch/hpcmips/vr/vripif.h Tue Jan 29 23:01:18 2002
***************
*** 34,39 ****
--- 34,41 ----
#define _VRIPIF_H_
#include <hpcmips/vr/cmuvar.h>
+ #include <hpcmips/vr/dmaauvar.h>
+ #include <hpcmips/vr/dcuvar.h>
#include <dev/hpc/hpciovar.h>
/* Vrip GPIO chip IDs */
***************
*** 51,56 ****
--- 53,60 ----
struct vrip_chipset_tag {
void *vc_sc;
vrcmu_chipset_tag_t vc_cc;
+ vrdmaau_chipset_tag_t vc_ac;
+ vrdcu_chipset_tag_t vc_dc;
int (*vc_power)(vrip_chipset_tag_t, int, int);
vrip_intr_handle_t (*vc_intr_establish)(vrip_chipset_tag_t, int, int,
int, int(*)(void*), void*);
***************
*** 62,67 ****
--- 66,73 ----
u_int32_t*);
void (*vc_register_cmu)(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
void (*vc_register_gpio)(vrip_chipset_tag_t, hpcio_chip_t);
+ void (*vc_register_dmaau)(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
+ void (*vc_register_dcu)(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
};
/*
***************
*** 76,81 ****
--- 82,90 ----
bus_addr_t va_addr2; /* i/o address 2 */
bus_size_t va_size2;
hpcio_chip_t* va_gpio_chips;
+ vrcmu_chipset_tag_t va_cc;
+ vrdmaau_chipset_tag_t va_ac;
+ vrdcu_chipset_tag_t va_dc;
#ifdef HPCMIPS_NOT_YET
bus_dma_tag_t va_dmat; /* DMA tag */
#endif
***************
*** 100,104 ****
--- 109,117 ----
((*(vc)->vc_register_cmu)((vc), (cmu)))
#define vrip_register_gpio(vc, gpio) \
((*(vc)->vc_register_gpio)((vc), (gpio)))
+ #define vrip_register_dmaau(vc, dmaau) \
+ ((*(vc)->vc_register_dmaau)((vc), (dmaau)))
+ #define vrip_register_dcu(vc, dcu) \
+ ((*(vc)->vc_register_dcu)((vc), (dcu)))
#endif /* !_VRIPIF_H_ */